In the field of microelectronic fabrication for computer applications, there is an ever-increasing demand for faster components. The semiconductor devices, themselves, are being continuously upgraded to increase speed, however, it is estimated that one-half of the processing time is taken up in inter-connection and power distribution circuitry. The delays encountered in the electronic package are therefore as critical to the overall performance time as are the device speeds. Furthermore, the reliability and useful life of components are concerns which must be addressed. One must additionally keep in mind the physical requirements and restrictions imposed by the different materials used in the overall component package. The properties desired in a semiconductor package include a thermal coefficient of expansion which is compatible with that of the devices connected thereto and the combination of a low dielectric, highly insulative material with internal conductors of high conductivity. Further physical properties which are desirable include high strength and toughness and a minimum of distortion of features during processing. The current packaging technology relies upon ceramics as the insulative materials with compatible metallurgy, such as alumina substrates with molybdenum lines and vias. The metallurgical requirements include fair conductivity and thermal stability at the processing temperatures necessary to fabricate the ceramic package.
The combination of highly insulative material, having a relatively low thermal expansion coefficient, with a good conductor, which will have a greater thermal expansion, results in tremendous stresses created in the materials during high temperature processing. Cracking can consequently occur in the insulative material. If further processing steps are performed, solvents can permeate the cracks in the package giving rise to reliability concerns.
One proposed solution to the cracking problem is to overcoat the substrate with an inorganic sealing layer, as taught in IBM Technical Disclosure Bulletin, Vol. 15, No. 6, page 1974 (Nov. 1972). Another article teaches filling the cracks by overcoating the ceramic with an inorganic dielectric layer and subsequently machining away the excess dielectric, down to the ceramic surface (See, IBM Technical Disclosure Bulletin Vol. 16, No. 2, page 624 (Jul. 1973). However, the proposed solutions to the crack problem do not address the fact that the substrate to metallurgy mismatch still exists and that further cracking may well occur due to temperature excursions encountered during processing steps conducted subsequently, such as device joining. When an overlayer sealing approach is used, thermal expansion mismatch may also be encountered between the substrate and the dielectric overlayer rendering the sealing layer itself susceptible to cracking and consequent permeability. Additionally, delamination concerns arise between a fully sintered body and a subsequently deposited glass overcoat. When using a full overlayer for sealing, the overcoat must be etched and screened to form metal vias connecting to the underlying metallurgy. The etching process may expose permeable areas of the substrate to adverse solvents and conditions. Subsequent metal deposition into those via holes, also, does not guarantee connectivity and, therefore, conductivity. Consequently, the delamination concern is compounded by the potential for creating an open in the metal contact should the metallized sealing layer expand and/or delaminate.
Attempts have been made to address the mismatch problem by matching the thermal coefficients of expansion (hereinafter TCE's) of the associated materials. However, sacrifices must then be made with regard to other equally desirable characteristics, such as the dielectric of the insulative material and the conductivity of the metallurgy.
Promoting the adhesion of the abutting materials is still another approach to the mismatch problem. One approach, taught in Japanese patent application 60-096586 of Hitachi Metal KK, is to enhance the adhesion of the abutting materials by increasing the contact surface area. Adhering the materials will not prevent cracking, however. Rather, the good adhesion of these materials can transfer the stresses causing cracks to propagate beyond the boundaries of the adhered materials and into the body of the ceramic located between the metal features.
Still another approach is to enhance the mechanical integrity of the ceramic, using known techniques to increase the crack resistance, i.e. toughness, of the ceramic, as taught in patent application Ser. No. 892,687, filed Aug. 1, 1986, and assigned to the present assignee. The toughening approach is effective; however, the dielectric properties of the ceramic may be adversely affected by the inclusion of toughening agents.
On the other hand, in seeking the ideal dielectric properties, sacrifices are made with regard to both the mechanical integrity of the substrate and its thermal properties. The art is replete with techniques for adjusting the dielectric constant (hereinafter, K) of a device substrate to decrease the capacitance and thereby increase the speed of transmission through the associated metallurgy. IBM Technical Disclosure Bulletin, Vol. 20, No. 12, page 5174 (May 1978) teaches the placement of spacers to provide for a layer of air as dielectric (having a K of 1) in series with the glass dielectric for a multilayer module. Another approach is to intersperse air throughout the glass or ceramic dielectric itself. A method for accomplishing this is taught in IBM Technical Disclosure Bulletin, Vol. 14, No. 9, page 2581 (Feb. 1972) wherein a foam-like glass having controlled amounts of microscopic voids is provided as the low dielectric substrate material. Still another publication, Japanese Patent application 59-111345 teaches the dispersion of hollow spherical powders into the raw ceramic slurry. Said hollow spheres remain intact after low temperature sintering to provide a K of 1 in "solution" with the ceramic dielectric value. Freeze-dried formation of hollow (or air-filled) alumina macropores is the subject of Japanese Patent 59-196740 to Kiyatama Koygakk. Each of the foregoing teachings discloses air-filled, non-permeable ceramic voids. Although adequate as low dielectric materials, the resulting substrates will be incapable of withstanding the thermal and tensile stresses of device joining. Furthermore, the spheres created will still be susceptible to cracking as a result of the thermal expansion mismatch. Moreover, even in the absence of cracking, the interstices of the voids/spheres may be permeable to processing solvents.
It is therefore an objective of the present invention to provide an impermeable substrate, having a low dielectric constant, for device mounting.
It is a further objective of the subject invention to provide a substrate, of low dielectric insulative material and internal metallurgy of high conductivity, which will be impervious to the effects of thermal expansion mismatch.
It is still another objective of the subject invention to provide a material which can be incorporated into an electronic packaging substrate to provide a flexible, hermetic link between the associated materials.
It is yet another objective of the present invention to teach a method for obtaining a uniform, fillable void in a substrate structure wherein the dielectric and metal materials are bonded by a flexible, hermetic linking agent introduced into that void.